Index: dev/pci/pccbb.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/pccbb.c,v
retrieving revision 1.31
diff -u -r1.31 pccbb.c
--- dev/pci/pccbb.c	23 Jul 2002 17:53:25 -0000	1.31
+++ dev/pci/pccbb.c	14 Jul 2004 14:08:55 -0000
@@ -1,5 +1,5 @@
 /*	$OpenBSD: pccbb.c,v 1.31 2002/07/23 17:53:25 drahn Exp $ */
-/*	$NetBSD: pccbb.c,v 1.42 2000/06/16 23:41:35 cgd Exp $	*/
+/*	$NetBSD: pccbb.c,v 1.96 2004/03/28 09:49:31 nakayama Exp $	*/
 
 /*
  * Copyright (c) 1998, 1999 and 2000
@@ -278,7 +278,7 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1131), CB_TI113X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1220), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -286,9 +286,9 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1225), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1211), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -296,7 +296,7 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1420), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1451), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -752,6 +752,45 @@
 		reg |= PCI113X_CBCTRL_PCI_CSC;
 		/* functional intr prohibit | prohibit ISA routing */
 		reg &= ~(PCI113X_CBCTRL_PCI_INTR | PCI113X_CBCTRL_INT_MASK);
+		pci_conf_write(pc, tag, PCI_CBCTRL, reg);
+		break;
+
+	case CB_TI12XX:
+		/*
+		 * Some TI 12xx (and [14][45]xx) based pci cards
+		 * sometimes have issues with the MFUNC register not
+		 * being initialized due to a bad EEPROM on board.
+		 * Laptops that this matters on have this register
+		 * properly initialized.
+		 *
+		 * The TI125X parts have a different register.
+		 */
+		reg = pci_conf_read(pc, tag, PCI12XX_MFUNC);
+		if (reg == 0) {
+			reg &= ~PCI12XX_MFUNC_PIN0;
+			reg |= PCI12XX_MFUNC_PIN0_INTA;
+			if ((pci_conf_read(pc, tag, PCI_SYSCTRL) &
+			     PCI12XX_SYSCTRL_INTRTIE) == 0) {
+				reg &= ~PCI12XX_MFUNC_PIN1;
+				reg |= PCI12XX_MFUNC_PIN1_INTB;
+			}
+			pci_conf_write(pc, tag, PCI12XX_MFUNC, reg);
+		}
+		/* fallthrough */
+
+	case CB_TI125X:
+		/*
+		 * Disable zoom video.  Some machines initialize this
+		 * improperly and experience has shown that this helps
+		 * prevent strange behavior.
+		 */
+		pci_conf_write(pc, tag, PCI12XX_MMCTRL, 0);
+
+		reg = pci_conf_read(pc, tag, PCI_SYSCTRL);
+		reg |= PCI12XX_SYSCTRL_VCCPROT;
+		pci_conf_write(pc, tag, PCI_SYSCTRL, reg);
+		reg = pci_conf_read(pc, tag, PCI_CBCTRL);
+		reg |= PCI12XX_CBCTRL_CSC;
 		pci_conf_write(pc, tag, PCI_CBCTRL, reg);
 		break;
 
Index: dev/pci/pccbbreg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/pccbbreg.h,v
retrieving revision 1.2
diff -u -r1.2 pccbbreg.h
--- dev/pci/pccbbreg.h	6 Jul 2000 19:49:11 -0000	1.2
+++ dev/pci/pccbbreg.h	14 Jul 2004 14:08:55 -0000
@@ -40,6 +40,7 @@
 #define PCI_BUSNUM   0x18	/* latency timer, Subordinate bus number */
 #define PCI_BCR_INTR 0x3C	/* intr line, intr pin, bridge control regs */
 #define PCI_LEGACY 0x44		/* legacy IO register address (32 bits) */
+#define PCI_SYSCTRL 0x80	/* System control */
 #define PCI_CBCTRL 0x90		/* Retry status, Card ctrl, Device ctrl */
 
 #define PCI_CLASS_INTERFACE_MASK  0xffffff00
@@ -82,6 +83,21 @@
 #define CB_BCR_PREFETCH_MEMWIN1 0x02000000
 #define CB_BCR_WRITE_POST_ENABLE 0x04000000
 
+/* TI [14][245]xx */
+#define PCI12XX_MMCTRL			0x84
+
+/* TI 12xx/14xx/15xx (except 1250, 1251, 1251B/1450) */
+#define PCI12XX_MFUNC			0x8c
+#define PCI12XX_MFUNC_PIN0		0x0000000f
+#define PCI12XX_MFUNC_PIN0_INTA		0x02
+#define PCI12XX_MFUNC_PIN1		0x000000f0
+#define PCI12XX_MFUNC_PIN1_INTB		0x20
+#define PCI12XX_MFUNC_PIN2		0x00000f00
+#define PCI12XX_MFUNC_PIN3		0x0000f000
+#define PCI12XX_MFUNC_PIN4		0x000f0000
+#define PCI12XX_MFUNC_PIN5		0x00f00000
+#define PCI12XX_MFUNC_PIN6		0x0f000000
+
 /*  PCI_CBCTRL bits for TI PCI113X */
 #define PCI113X_CBCTRL_INT_SERIAL 0x040000
 #define PCI113X_CBCTRL_INT_ISA    0x020000
@@ -96,7 +112,18 @@
 #define PCI113X_CBCTRL_INTR_DET 0x0100 /* functional interrupt detect */
 
 /*  PCI_CBCTRL bits for TI PCI12XX */
-#define PCI12XX_CBCTRL_INT_SERIAL 0x040000
+#define PCI12XX_SYSCTRL_INTRTIE		0x20000000u
+#define PCI12XX_SYSCTRL_VCCPROT		0x200000
+#define PCI12XX_SYSCTRL_PWRSAVE		0x000040
+#define PCI12XX_SYSCTRL_SUBSYSRW	0x000020
+#define PCI12XX_SYSCTRL_CB_DPAR		0x000010
+#define PCI12XX_SYSCTRL_CDMA_EN		0x000008
+#define PCI12XX_SYSCTRL_KEEPCLK		0x000002
+#define PCI12XX_SYSCTRL_RIMUX		0x000001
+#define PCI12XX_CBCTRL_CSC		0x20000000u
+#define PCI12XX_CBCTRL_ASYNC_CSC	0x01000000u
+#define PCI12XX_CBCTRL_INT_SERIAL	0x060000
+#define PCI12XX_CBCTRL_INT_PCI_SERIAL	0x040000
 #define PCI12XX_CBCTRL_INT_ISA    0x020000
 #define PCI12XX_CBCTRL_INT_PCI    0x000000
 #define PCI12XX_CBCTRL_INT_MASK   0x060000
Index: dev/pci/pccbbvar.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/pccbbvar.h,v
retrieving revision 1.6
diff -u -r1.6 pccbbvar.h
--- dev/pci/pccbbvar.h	14 Mar 2002 01:26:59 -0000	1.6
+++ dev/pci/pccbbvar.h	14 Jul 2004 14:08:55 -0000
@@ -53,12 +53,13 @@
 #define	CB_TOPIC95B	6	/* Toshiba ToPIC95B */
 #define	CB_TOPIC97	7	/* Toshiba ToPIC97 */
 #define	CB_CIRRUS	8	/* Cirrus Logic CL-PD683X */
-#define	CB_CHIPS_LAST	9	/* Sentinel */
+#define	CB_TI125X	9	/* TI PCI1250/1251(B)/1450 */
+#define	CB_CHIPS_LAST	10	/* Sentinel */
 
 #if 0
 static char *cb_chipset_name[CB_CHIPS_LAST] = {
 	"unknown", "TI 113X", "TI 12XX", "RF5C47X", "RF5C46X", "ToPIC95",
-	"ToPIC95B", "ToPIC97", "CL-PD 683X",
+	"ToPIC95B", "ToPIC97", "CL-PD 683X", "TI 125X",
 };
 #endif